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Senior Digital IC Verification Engineer

Neuralink

Neuralink

Fremont, CA, USA
Posted on Saturday, May 25, 2024

Company Description:

We are creating the future of brain-computer interfaces: building devices now that have the potential to help people with paralysis regain mobility and independence and invent new technologies that could expand our abilities, our community, and our world.

Team Description:

The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.

Job Responsibilities and Description:

The Senior Digital IC Verification Engineer will be responsible for leading the team efforts on the functional verification of neural recording and stimulation SoCs, which include low-power processors, digital signal processing, hardware accelerators, and analog/mixed-signal IPs. The ideal candidates are people who get excited about building things, are highly analytical, and enjoy tackling new problems regularly

Required Qualifications:

  • Bachelor of Science (B.S.) degree in computer science or a related field, or equivalent experience
  • Minimum 3 years of experience in digital ASIC verification
  • Excellence in SystemVerilog
  • Experience in developing automation flow and scripts such as Python, Perl, Makefile, Tcl and UNIX shell
  • Experience with code coverage and regression setup

Preferred Qualifications:

  • Experience working on complex digital systems from architecture, microarchitecture, RTL, verification and physical design using industry standard tools
  • Experience building test benches, testing, and debugging for a complex system-on-chip
  • Experience in formal verification
  • Functional modeling experience and logic verification with SystemVerilog, SystemC/C++.
  • Experience with IEEE-1801 (UPF) based design simulation flows
  • Experience with low power gate level simulations
  • Exposure with low power formal verification flows
  • Strong hands-on experience in verification methodologies such as UVM
  • Knowledge of ARM/RISC-V processor, AMBA bus
  • Knowledge of power aware verification
  • Experience with FPGA/emulation
  • Experience with lab system bring up, writing diagnostic, and lab debugging
  • Experience with build tools such as CMake and Bazel

Pay Transparency:

Based on California law, the following details are for California individuals only:

California base salary range:
$158,000$243,000 USD
For Full-Time Employees, your compensation package will include two major components: salary and equity. Guidance on salary for this role will be determined according to the level at which you enter the organization, with the ability to gain more over time as you contribute. In addition, Full-Time Employees are eligible for the following benefits listed below.

What We Offer:

  • An opportunity to change the world and work with some of the smartest and most talented experts from different fields
  • Growth potential; we rapidly advance team members who have an outsized impact
  • Excellent medical, dental, and vision insurance through a PPO plan
  • Paid holidays
  • Commuter benefits
  • Meals provided
  • Equity + 401(k) plan *Temporary Employees & Interns excluded
  • Parental leave *Temporary Employees & Interns excluded
  • Flexible time off *Temporary Employees & Interns excluded

Multiple studies have found that a higher percentage of women and BIPOC candidates won't apply if they don't meet every listed qualification. Neuralink values candidates of all backgrounds. If you find yourself excited by our mission but you don't check every box in the description, we encourage you to apply anyway!

Neuralink provides equal opportunity in all of our employment practices to all qualified employees and applicants without regard to race, color, religion, gender, national origin, age, disability, marital status, military status, genetic information or any other category protected by federal, state and local laws. This policy applies to all aspects of the employment relationship, including recruitment, hiring, compensation, promotion, transfer, disciplinary action, layoff, return from layoff, training and social, and recreational programs. All such employment decisions will be made without unlawfully discriminating on any prohibited basis.

If you need a reasonable accommodation at any point in the interview process, please let us know. Reasonable accommodations are modifications or adjustments to the application or hiring process that would enable you to fully participate in those processes. Examples of reasonable accommodations include but are not limited to:

  • Documents in alternate formats or read aloud to you
  • Having interviews in an accessible location
  • Being accompanied by a service dog
  • Having a sign language interpreter present for the interview